AIEEE and Earlier JEE Main Questions: Logic Gates

Transcript

0:00Introduction

Hello everyone! Let me start with a small puzzle. Take a NAND gate, the gate that does AND and then NOT. Now join three of them in the right way. What comes out is an OR gate. How can gates built from AND end up doing OR? That sounds strange, doesn't it? Today we settle it, with past questions from AIEEE and JEE Main on logic gates. Questions like these come up often, and they are quick marks. So, let's begin.

0:32The basic gates: OR, AND, NOT

First, the language of gates. Every digital signal has only two levels. Zero means low, about zero volts, and one means high, about five volts; the capital V on screen stands for volts. The figure shows five gates: for each, its symbol, its Boolean expression, and its truth table, which lists the output for every combination of inputs. Okay? Now the OR gate, first in the figure. The inputs are A and B, and Y is the output. Y equals A plus B, and the output is one if at least one input is one. So it is zero only when all the inputs are zero. Remember that phrase, because it answers a JEE Main question today. Right? Next, AND: Y equals A dot B, with a small dot between the letters. The output is one only if all the inputs are one. See its truth table: a one only in the last row. Clear? And NOT, the inverter, on the far right of the figure, with a single input. Y equals A bar, that is, A with a bar on top, and it means the opposite of A: zero becomes one, and one becomes zero. Got it? Now a quick question for you. In ordinary arithmetic, one plus one is two. But in Boolean algebra, what is one plus one? It is one, very good! Here the plus sign means OR, and the dot means AND, not ordinary addition and multiplication. So one plus one means one OR one, and that is one. With me?

2:12NAND and NOR: the universal gates

Now the third gate in the figure, NAND, which is AND followed by NOT. Y equals A dot B, with a long bar over the whole thing. The small circle at the output of its symbol is that NOT. Its output is zero only when all the inputs are one. Okay? In the same way, NOR is OR followed by NOT: Y equals A plus B, with a long bar over the whole thing. Its output is one only when all the inputs are zero, so its truth table has a single one, in the first row. Right? Now let me ask you something that helps us today. Suppose we join the two inputs of a NAND gate, so the same A goes into both inputs. What does the gate do then? Yes, exactly, it becomes a NOT gate! Both inputs zero give an output of one, and both inputs one give zero, which is just the opposite of the input. The same is true for a NOR gate with its inputs joined. Clear? And that is why NAND and NOR are called universal gates. The three basic gates, and so any logic circuit, can be built from NAND gates alone, or from NOR gates alone. Got it?

3:22De Morgan: break the bar, change the sign

Now a tool that cracks many gate combinations: De Morgan's theorems. The first one says, A plus B with a long bar on top equals A bar dot B bar. The way to remember it is, break the bar, and change the sign. The long bar breaks into two short bars, and the plus becomes a dot. Okay? Now you try the second one. Take A dot B, with a long bar on top. Break the bar and change the sign. What do you get? You get A bar plus B bar, perfect! The bar breaks into two, and the dot becomes a plus. Careful, because many students break the bar and forget to change the sign. Right? One more rule. Put two bars on top of A, and you get back just A, since two NOTs cancel. Two NOT gates one after the other give back the input. With me? And whenever you doubt an identity, compare the truth tables of both sides, row by row. That always settles it. Clear?

4:24Example 1: which gate gives 0 only when all 4 inputs are 0

Now example one, from JEE Main twenty sixteen. Here, a gate has four inputs, small a, b, c and d, and small x is its output. Its time graph shows that x is high whenever at least one of the inputs is high, and low only when all four are low. Which gate is it? Pause the video and try it first. Done? Okay, let's check. Four inputs give two to the power four, that is sixteen, input combinations. Okay? And x is low, that is zero, in just one of those sixteen rows, when a, b, c and d are all zero. Right? Now here is the trap. NAND is also low in just one row of its truth table. So which is it, OR or NAND? Look at which row it is, in the truth tables in the figure. NAND is zero only in the last row, when all its inputs are one, but our x is zero when all inputs are zero, so it is not NAND. Clear? And OR is zero only in the first row, when all its inputs are zero, our phrase from the basics. So x equals a plus b plus c plus d, a four-input OR gate. Got it?

5:43Example 2: three NAND gates combine to make an OR gate

Now example two, from AIEEE two thousand ten, and this is our puzzle from the start, so do not just trust me, work it out. Inputs A and B are each fed to both inputs of a NAND gate, and the two outputs go to a third NAND gate. What does the combination yield? Pause the video and try it first. Done? Okay, let's check. The first NAND gets A on both inputs. Now, A dot A is just A, so A dot A with a long bar on top is A bar. It works as a NOT gate, just as we saw. Okay? In the same way, the second NAND turns B into B bar. Right? These two outputs go into the third NAND gate. So the output Y is A bar dot B bar, with a long bar over the whole thing. Clear? Now, careful here. There is a dot inside, so many students answer AND. Is that right? No, no, it is not an AND gate at all, and here is why. Use De Morgan, break the bar and change the sign: the long bar splits, and the dot becomes a plus. So Y is A with two bars, plus B with two bars, and two bars cancel. So Y equals A plus B, which is OR. With me? Let us check one row of the truth table. If A and B are both zero, then A bar and B bar are both one, and Y is one dot one with a bar on top, which is zero. That matches A plus B, since zero OR zero is zero. Got it? So the combination is an OR gate, made from three NAND gates. And there is our puzzle solved: inverting both inputs of a NAND gate turns it into OR. That is the power of a universal gate. Clear?

7:34Quick revision: OR vs NAND, De Morgan, NAND as NOT

So, quick revision. OR is zero only when all inputs are zero, and NAND is zero only when all inputs are one. De Morgan: break the bar, and change the sign. And with its inputs joined, a NAND or a NOR gate is a NOT gate, and three NAND gates make an OR gate. Now try these questions again on your own, without the video, and then try the practice problems on this page. All the best!